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A Commercial and Military
Semiconductor Services Company

Failure analysis

Reliability Analysis and Failure Analysis

Criteria Labs has extensive microelectronic Failure Analysis process capabilities. Our engineers and analysts can evaluate your integrated circuits that may have failed during design, manufacture, qualification or service to locate and help identify the problem.

Capabilities

  • Acoustic Microscopy (CSAM)
  • Focus Ion Beam (FIB)
  • Scanning Electron Microscope (SEM)
  • X-Ray
  • Real Time X-Ray
  • Cross Sectioning
  • Micro-Probe
  • Light Emission Microscopy
  • De-Cap (Wet) manual/acid jet etcher
  • Construction Analysis
  • Parallel Polishing
  • Front Lapping
  • Latch Up / Electrical Overload Stress (EOS)
  • Electro Static Discharge (ESD)
  • EDX
  • Digital image capture
  • Solderability Testing

 

Die Processing

ESD & Latch up

Criteria Labs is a turnkey test facility for the characterization of Electro Static Discharge (ESD) and latch-up in semiconductor components. Characterization of ESD and latch-up for immunity in integrated circuits is required by industry standards, including the Mil-Std 883, the Electronic Industries Association (EIA/JEDEC), and the Automotive Electronics Council (AEC).

Criteria Labs is dedicated to providing our customers with consistent, accurate testing with quality test reporting. In the event of ESD or latch-up failure, Criteria Labs analytical services staff are on-site and can quickly determine the root cause, significantly improving problem resolution cycle times.

In the event of ESD or latch-up failure, Criteria Labs analytical services staff are on-site and can quickly determine the root cause, significantly improving problem resolution cycle times.

Capabilities

  • Characterize all pins, establish ESD sensitivities and failure threshold
  • ESD Testing per JEDEC, ESDA, Mil-Std-883 and AEC
  • Testing available: Human Body Model (HBM), Machine Model (MM), and Charged Device Model (CDM)
  • Test and characterize all package types
  • Die ESD and Latch-up characterization available. Our packaging lab will assemble die into a standard dip package then test
  • Automated Latch-up Testing: Static, Dynamic and Transient
  • Testing available: CMOS / EIA / JEDEC No. 17 & 78; custom; elevated temperature to 160C
  • Testing up to 512 pins

 

Reliability Lab

Destructive Physical Analysis (DPA)

Criteria Labs has complete Destructive Physical Analysis (DPA) process capabilities. DPA is the process of disassembling, testing, and inspecting a component for the purpose of determining conformance with applicable design and process requirements.

This process of sample testing is used to ensure that high reliability components or devices are fabricated to the required standards. In addition to routine DPA, Criteria Labs performs constructional analysis on COTS components on a regular basis for our customers qualifying non-QPL or non-QML product.

The requirements for these analyses are tailored and customized individually to address our customer's needs and concerns.

 

 

 

 

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